set_directory.vhd

--------------------------------------------------------------------------

-- FILENAME : set_directory.vhd

--

-- Calculates the position of a directory entry and reads the necessary

-- sector.  The offset of the directory entry is then output.

--

-- AUTHOR       : Craig Dunn

-- DATE STARTED : 16 April 2004

-- TAB SETTING  : 4

-- RESET        : Sync

-- KNOWN BUGS   : None

-- VERSION      : 1.0

--

-- All of the design and code in this module is my own work.  No design or

-- code has been borrowed or copied from any source.

--------------------------------------------------------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.all;

use IEEE.STD_LOGIC_ARITH.all;

use IEEE.STD_LOGIC_UNSIGNED.all;



entity set_directory is

    port ( FDD_RDY         : in std_logic;

           MCLK            : in std_logic;

           FDD_BSY         : in std_logic;

           ENTRY           : in std_logic_vector(7 downto 0);

           SET             : in std_logic;

           WR_DIR          : in std_logic;

           RAM_WE          : out std_logic;

           SET_BSY         : out std_logic;

           TRACK           : out std_logic_vector(7 downto 0);

           SIDE            : out std_logic;

           SECTOR          : out std_logic_vector(4 downto 0);

           OFFSET          : out std_logic_vector(8 downto 0);

           WR_SECT         : out std_logic;

           RD_SECT         : out std_logic

         );

end set_directory;



architecture set_directory_arch of set_directory is



   signal sig_sector       : std_logic_vector(3 downto 0);

   signal sig_offset       : std_logic_vector(3 downto 0);



begin



   SECTOR      <= '0' & sig_sector;

   OFFSET      <= sig_offset & "00000";

   TRACK       <= (others => '0');

   SIDE        <= '0';

   RAM_WE      <= '1';



   main : process(MCLK)

   begin

      if rising_edge(MCLK) then

         if FDD_RDY = '0' then

            SET_BSY     <= '0';

            RD_SECT  <= '0';

            WR_SECT  <= '0';

            sig_sector  <= (others => '0');

            sig_offset  <= (others => '0');

         else

            if FDD_BSY = '1' then

               RD_SECT  <= '0';

               WR_SECT  <= '0';

            elsif SET = '1' and FDD_BSY = '0' then

               sig_sector  <= ENTRY(7 downto 4) + x"2";

               sig_offset  <= ENTRY(3 downto 0);

               RD_SECT  <= '1';

               SET_BSY     <= '1';



            elsif WR_DIR = '1' and FDD_BSY = '0' then

               sig_sector  <= ENTRY(7 downto 4) + x"2";

               sig_offset  <= ENTRY(3 downto 0);

               WR_SECT  <= '1';

               SET_BSY     <= '1';

            elsif FDD_BSY = '0' then

               SET_BSY <= '0';

            end if;

         end if;

      end if;

   end process main;





end set_directory_arch;